3-Level DC/DC Converter How 3-Level DC/DC Converters Reduce BOM and System Costs

3-level DC/DC converters offer higher efficiency while requiring less space and costing less. Because this topology uses smaller components, has lower losses, and features a more streamlined bill of materials, it is well-suited for high-power power supplies.

Alex Zhou is a Product Marketing Manager at Renesas

Modern power supply systems face two conflicting requirements: higher power output at lower costs. Whether powering next-generation consumer electronics, power tools, or high-power USB-PD applications, developers must integrate more efficient solutions into smaller and more cost-effective designs. One promising solution is the 3-level DC/DC converter architecture. It enables significant efficiency gains, lowers bill of materials (BOM) costs, and reduces PCB size.

Why a 3-level DC/DC Converter?

A 2-level buck controller uses two FETs (external or internal) and a single inductor for power transfer. The topology is referred to as a 2-level buck converter because the switching node alternates exclusively between V_IN and ground. In this topology, the FETs must block the full V_IN voltage when turned off, and the current ripple across the inductor reaches its maximum at a duty cycle of 50%.

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Compared to a conventional two-stage (2L) buck converter, the three-stage (3L) buck converter consists of two additional switches and a flying capacitor. Switches Q1 and Q4 operate out of phase, as do Q2 and Q3.

The switching node (V_SW) alternates between V_IN and V_IN/2, or between V_IN/2 and ground—hence the term “3-level.”

In steady state, the flying capacitor maintains a voltage of V _IN /2, which reduces the voltage stress on the switches. This allows the use of FETs with a lower breakdown voltage and a better figure of merit, thereby reducing both conduction and switching losses.

This topology also allows for the use of a smaller inductor, since only half of V_IN is applied to it. The current ripple across the inductor occurs at twice the switching frequency of the FETs. As a result, the current ripple (peak-to-peak) is only one-quarter of the value of a 2-level converter, which leads to reduced core losses and lower DCR losses in the inductor.

Opportunities for Reducing the Bill of Materials

By taking advantage of the improved thermal and electrical efficiency of 3-level designs, developers can:

• Reduce the size of inductors and capacitors without compromising performance.
• Reduce the number of components by using simplified snubber circuits and EMI filtering.
• Select MOSFETs with a lower breakdown voltage, which are more cost-effective and have lower conduction losses.

Practical Application Examples

USB-PD Multi-Port Chargers: In high-power USB-PD applications (especially EPR > 65 W), efficiency and thermal management are of critical importance. A 3-level DC/DC converter can operate at higher switching frequencies without compromising efficiency. This enables the use of smaller magnetic components and faster transient response. The reduced heat loss enables slimmer, fanless enclosures and directly lowers manufacturing and material costs.

Power supply products for the consumer market: In products such as laptops, docking stations, and high-end portable audio equipment, space on the printed circuit board is often limited. A smaller power stage not only reduces bill-of-materials costs but also frees up additional PCB space for other functions or reduces the form factor. A power stage architecture that combines a 3-level and a 2-level switching node also enables operation in buck, buck-boost, or boost modes.

Lower Voltage Load

Since each component in a 3-level converter is subjected to a smaller voltage change, the voltage derating requirements are reduced. For example, in a 2-level step-down converter that steps down 24 V to 5 V, the high-side MOSFET must block the full 24 V when turned off. This requires a component with a breakdown voltage of 30 V to 40 V, as well as a higher R_DS(on) and higher cost. In a 3-level topology, however, the MOSFET only needs to block about half of this voltage (≈12 V). This allows the use of a MOSFET with a voltage rating of 15 V to 30 V, featuring a significantly lower R_DS(on), better switching characteristics, and lower cost.

This effect carries through the entire design: The reduced voltage stress allows designers to select components with lower breakdown voltage and higher power handling. These components often have a better Figure of Merit (FOM) as well as lower conduction and switching losses. The result is a smaller, more cost-effective power stage that generates less heat.

Advantages: Inductance and Efficiency

Since current ripple is inherently lower in a 3-level converter, the requirements for the size of the inductor are also reduced. For example, in a 2-level buck converter that steps down from 24 V to 12 V, the inductor must handle the full voltage change from 24 V to 0 V during each switching cycle. This results in higher current ripple (peak-to-peak), so designers must use larger inductors with a higher core volume and more copper windings. Larger inductors not only increase costs but also result in higher direct-current resistance (DCR). This increases conduction losses and further reduces efficiency.

In a 3-level buck converter, the effective voltage across the inductor is halved because the switching operations occur between the intermediate levels (≈12 V to 0 V or 24 V to 12 V). This reduces current ripple by nearly 50%, allowing the same level of current ripple to be achieved with a smaller inductor. Smaller inductors with lower DCR result in reduced conduction losses, faster transient response, and a more compact design. At the same time, the lower current ripple reduces the load on the output capacitors and improves system reliability. The result is higher efficiency, a smaller footprint, and lower overall system costs. This makes the 3-level topology particularly attractive for applications with high currents and limited space.

Impact at the System Level

The transition to a 3-level DC/DC architecture is not just a change at the component level; it also has implications for the entire system. These can translate into measurable benefits across the entire product design.

Lower thermal design requirements: Because the 3-level topology reduces switching and conduction losses, less heat is generated in the power stage. For example, in a 200-W USB PD charger, power dissipation can be reduced by 1 W to 2 W compared to a 2-level design. As a result, a bulky aluminum heat sink can be replaced by a smaller, stamped metal part—or eliminated entirely. This eliminates the need for thermal pads or heat pipes and reduces bill-of-materials costs as well as assembly complexity.

Smaller PCB area for power conversion: Thanks to lower losses and reduced voltage stress, inductors and capacitors can be designed to be smaller. In a typical notebook power supply, for example, the area of the power stage can be reduced by 20% to 30%. This frees up valuable space on the PCB, which can be used for additional connectors, wireless charging coils, or an optimized mechanical design. In addition, smaller components enable a more compact design and make it easier to meet specifications regarding enclosure size or weight.

Higher efficiency leads to lower operating costs for the end user: For consumer devices produced in large volumes, efficiency gains of 0.5% to 1% already result in noticeable energy savings over the product’s entire lifespan. For example, a 95% efficient 240 W 3-level USB PD charging adapter operating at full load for eight hours a day loses about 12 W less power than a 93% efficient 2-level design. This reduces both electricity costs and heat generation for the end user. This is particularly relevant in corporate or data center environments where dozens or hundreds of such devices are in use.

Conclusion

The 3-level DC/DC converter is an effective solution for maximizing value in power supply systems. Since bill-of-materials costs are reduced, components are becoming smaller, and thermal management is simplified, developers can use this topology to create high-performance, cost-effective products that meet the demands of modern applications. With the growing demand for USB-PD and other high-power applications, the 3-level approach is becoming increasingly attractive to developers who prioritize both performance and cost-effectiveness. 

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