Foundry BusinessRapidus Aims to Pressure TSMC with a 2nm Pricing Strategy
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| Translated by AI
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Declaration of war in the foundry business: The Japanese contract manufacturer Rapidus aims to challenge industry leader TSMC in the 2nm foundry business through pricing. However, the roadmap to the targeted mass production in 2027 heavily depends on interested customers, yield proofs, and government funding.
With an ambitious pricing strategy, Rapidus, still a relatively young company as a contract manufacturer, aims to directly challenge the dominant competitor TSMC from Japan. However, apart from the technological race, the targeted goal heavily depends on customer demand and investments from the Japanese government.
(Image: Rapidus)
Rapidus positions itself in the race for leading logic processes with an aggressive pricing strategy. According to Nikkei, the Japanese foundry newcomer plans to offer its anticipated 2nm services at least at TSMC's price level or slightly below.
Rapidus cites a reference range of 3.0 to 3.5 million yen per wafer. This currently corresponds to approximately 18,500 to 21,500 USD, although exchange rates and customer-specific requirements may influence the final price.
This would position Rapidus significantly below the rumored prices of established providers. TSMC's 2nm process and Intel's 18A node are reported in industry reports to be around 30,000 USD per wafer, while Samsung's 2nm offering is estimated at approximately 20,000 USD.
Price Competition Meets Limited Capacities
The timing is strategically significant, as TSMC and Samsung are reportedly implementing price increases for several advanced nodes. At TSMC, increases of 5 to 10 percent are being reported for processes such as 3nm, 5nm, and 7nm, while Samsung is said to be raising new customer prices by around 15 percent for selected highly demanded nodes.
Rapidus is building its 2nm ambitions on the IIM-1 fab in Chitose, Hokkaido. The pilot line began operations in April 2025 after ASML delivered Japan's first mass-production-capable EUV system, the TWINSCAN NXE:3800E, at the end of 2024. The planned ramp-up is ambitious. Rapidus aims for mass production in the second half of fiscal year 2027 and plans to scale from around 6,000 wafer starts per month to approximately 25,000 wafer starts within the first year.
Technologically, the 2nm process is based on a gate-all-around nanosheet approach that emerged from cooperation with IBM. Rapidus engineers were trained for this at the Albany NanoTech Complex before the transfer to Chitose began.
Technology Alone Is Not Enough
As a differentiation feature, Rapidus points to a manufacturing concept with single-wafer front-end processing. Under the name Rapid and Unified Manufacturing Service, wafer data is to be fed into AI models to improve yield learning and throughput times. However, the crucial proof for industrial scaling is still missing. While Rapidus has reported a 2nm prototype with expected electrical properties, it has not yet published reliable yield data.
Financing remains another key issue. In February, Rapidus completed a funding round of 267.6 billion yen, with 100 billion yen coming from state funds and 167.6 billion yen from 32 private companies. Additionally, Japan has pledged extensive support for the coming years. The state's involvement makes Tokyo the largest single shareholder and grants the government special rights to influence key decisions such as technology partnerships or share transfers.
Planned timelines and pricing strategies for 2nm manufacturing processes from TSMC, Samsung Foundry, Intel Foundry, and Rapidus in comparison.
(Image: Trendforce)
According to CEO Atsuyoshi Koike, Rapidus is in talks with more than 60 companies, mostly from abroad. Preliminary price offers have reportedly been sent to around ten potential customers. Specific design partnerships exist with companies such as Tenstorrent and Esperanto Technologies, both focused on energy-efficient AI and RISC-V designs. However, binding high-volume orders that fully utilize the planned capacity would be crucial for the business model.
Japan's semiconductor strategy is thus running on two tracks. While TSMC's JASM plant in Kumamoto already serves mature nodes for automotive and industrial applications and prepares a second fab with more advanced nodes, Rapidus takes on the riskier part of the national return to the leading edge.
Long-term, Rapidus is aiming for 1.4nm by 2029, operational profitability by fiscal year 2030, and an IPO in fiscal year 2031. Whether this roadmap is feasible depends mainly on three points: a named volume customer, reliable yield progress at 2nm, and proof that the fab in Chitose reaches the planned capacity ramp.
Date: 08.12.2025
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