Requirements for Processor Architectures Which RISC? RISC-V, Edge AI, and Application-Optimized Architectures as a New Market Paradigm

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SIMTOS (Seoul International Machine Tool Show)

It doesn't always have to be ARM: RISC-V, edge AI, and specialized compute architectures are transforming the semiconductor market. Open ecosystems, flexible IP, heterogeneous accelerators, and close integration of hardware, software, and manufacturing are in greater demand than ever. Depending on the requirements, solutions may be recommended that also make other processor classes and IPs worth considering.

The semiconductor market is undergoing a fundamental shift toward more specialized, application-optimized computing architectures. AI functions are increasingly moving from the cloud to real-world deployment environments and to the edge of networks, where they must operate within tight power, area, and latency constraints. At the same time, RISC-V is gaining prominence as an open instruction-set architecture. A broad, multi-vendor ecosystem enables developers to choose among different IP, tool, and implementation options and reduce their dependence on proprietary platforms.

This also changes the requirements for processor IP. In addition to computing power and energy efficiency, adaptability, software support, verification, and short development cycles are becoming increasingly important. Especially for complex designs—ranging from high-performance application processors to AI accelerators and edge computing platforms—a single CPU core is increasingly insufficient. Instead, what’s needed are carefully coordinated combinations of processors, DSPs, NPUs, accelerators, software, and development tools.

Against this backdrop, the consolidation and realignment of established IP providers also reflect a broader market trend. One example of this is the integration of MIPS and ARC technologies, as well as the closer integration of processor IP, custom silicon, and manufacturing optimization.

RISC-V and Physical AI Are Changing the Requirements for Processor Architectures

As AI functions are increasingly integrated into vehicles, machines, robots, wearables, and other physical systems, there is a growing need for computing architectures tailored to specific workloads. Under the umbrella term “Physical AI,” the focus is particularly on real-time capability, energy efficiency, deterministic behavior, and the processing of heterogeneous sensor data.

RISC-V provides a flexible technological foundation for this. The open ISA allows for different implementations and extensions, while developers can choose among multiple IP and tool providers. This fosters competition in which the key differentiator is not so much the instruction set architecture itself as the quality of the specific implementation, the software ecosystem, and the customization options.

As a result, interest in custom silicon is growing, particularly for edge AI applications. Instead of processors designed to be as universal as possible, architectures are needed that are specifically tailored to certain computation patterns, data paths, and power budgets. At the same time, vendors must take existing investments into account: in many markets, established MIPS, ARC, or other architectures will remain tied to products and platforms for years to come. The transition to RISC-V is therefore likely to take place gradually, in many cases, in line with existing product cycles.

From Individual IP Blocks to Integrated Compute Platforms

Another market trend is the shift from isolated processor cores to more comprehensive compute platforms. For many applications, simply licensing a CPU IP is no longer sufficient. There is a demand for combinable building blocks consisting of CPU cores, DSPs, NPUs, and specialized accelerators, supplemented by software stacks, development tools, and verification environments.

The integration of MIPS and ARC technologies is an example of this trend. The respective portfolios cover different processor classes and accelerator architectures and are expected to be used more extensively in the future as building blocks for comprehensive system solutions.

At the same time, coordination between architecture and semiconductor manufacturing is becoming increasingly important. Process nodes, packaging, memory interfacing, and physical implementation have a significant impact on performance, power consumption, and chip area. Closer collaboration between IP providers, ASIC developers, and foundries can therefore help tailor designs more specifically to the respective application, particularly in edge AI, industrial automation, robotics, wearables, and the automotive sector.

For developers, this shifts the central question: It is no longer just “Which processor core should I use?” but rather “Which combination of computing architecture, accelerators, software, and manufacturing technology best meets the needs of my workload?”

When it comes to integrating existing IP portfolios, it is also clear that the market demands varying degrees of specialization. General-purpose processors coexist alongside application-specific instruction-set processors, DSPs, NPUs, and other accelerators.

The ASIP toolchain used to date in the ARC ecosystem is intended, for example, to continue serving customers who wish to develop highly specialized processor cores for specific applications. VPX-DSP and NPX-NPU, on the other hand, can be used both as standalone IP blocks and within more comprehensive platform solutions.

Such offerings reflect a general trend: processor IP is increasingly evolving into a development ecosystem comprising hardware, software, toolchains, virtual platforms, debugging, and verification. The goal is to shorten the time between the architecture decision and market-ready silicon while simultaneously creating more opportunities for differentiation.

At the same time, long-term support for existing architectures remains important. Particularly in the automotive, industrial, and other markets with long product lifecycles, processor platforms can be used for many years or even decades. Migrations to RISC-V must therefore be compatible with existing software, certifications, tools, and product roadmaps.

RISC-V Is Driving Differentiation in the Processor IP Market

Competition between RISC-V providers and established proprietary processor platforms is increasingly being decided by factors other than just the ISA. For applications in the automotive, edge AI, or industrial control sectors, what matters most are implementation quality, performance per watt, functional safety, software support, and the ability to customize solutions to meet specific customer needs.

RISC-V is changing the competitive landscape. Thanks to its open architecture, multiple vendors can develop compatible processors, while companies can simultaneously implement their own extensions or even their own cores. As a result, differentiation now centers on the specific microarchitecture and the surrounding ecosystem.

Vendors such as MIPS are therefore seeking to position themselves based on their long-standing experience with processors, optimized implementations, and the combination of various compute building blocks. The key factor here is not so much the ISA alone as the interplay between CPU IP, software enablement, customization, and physical implementation.

As AI workloads and intelligent edge applications become more specialized, the ability to assemble computing resources in a granular manner becomes increasingly important. CPUs handle general control and application tasks, while DSPs, NPUs, and specialized accelerator IP can execute specific workloads more efficiently.

Freedom of Choice Is Becoming a Competitive factor in the RISC-V Ecosystem

A key difference from more closed processor ecosystems lies in the structure of the RISC-V market itself. Developers can choose between commercial IP providers, open-source implementations, and in-house processor designs. This fosters competition that promotes both innovation and specialization.

However, this freedom of choice places new demands on IP providers. For complex designs, simply providing a processor core is often not enough. Customers also expect software ecosystems, verification support, development tools, reference implementations, and assistance with physical integration.

Foundry neutrality also plays an important role in this context. Processor IP must, in principle, be implementable on different manufacturing technologies, while at the same time, optimizations for specific process nodes can offer advantages in terms of performance, power consumption, or chip area.

In this context, the collaboration between MIPS and Globalfoundries can be seen as an example of this tension: On the one hand, IP and manufacturing can be specifically tailored to each other; on the other hand, customers still have the option of using the same architecture with other manufacturing partners. Process-specific optimizations thus ideally expand the available options rather than creating new dependencies.

Technical Integration: Evolution Rather Than a Break in Architecture

Even in the case of acquisitions and portfolio consolidations, there are many arguments in favor of a gradual technical integration. Existing processor families often have their own customer bases, software stacks, development tools, and long-term product roadmaps. A hasty standardization could jeopardize existing investments.

Existing customers will continue to receive support for the MIPS and ARC processors they use. Opportunities for closer integration focus primarily on areas that are independent of the underlying microarchitecture, including software enablement, toolchains, debugging, profiling, and virtual prototyping.

In the long term, this could lead to more integrated platforms in which different processor cores and accelerators draw on shared development environments. For the market, this would represent another step away from rigid, standalone architectures toward modular computing platforms.

The future of embedded and edge computing is increasingly shaped by application-optimized architectures. RISC-V provides an open technological foundation for this. However, the real competition will be decided by how efficiently CPUs, DSPs, NPUs, accelerators, software, and manufacturing technology can be integrated into a platform tailored to the specific application. 

*Rich Collins is Senior Director of Product Management for the application processor IP portfolio at "MIPS by Globalfoundries"

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