Synopsys Integrates Multiphysics Analyses Directly into Chip Design

Multiphysics Fusion Synopsys Integrates Multiphysics Analyses Directly into Chip Design

2026-06-22 By Dipl.-Ing. (FH) Hendrik Härter | Translated by AI 2 min Reading Time

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With Multiphysics Fusion, Synopsys aims to break down the silos between logical chip design and physical simulation. Through the deep integration of Ansys technologies, developers can optimize thermal, electromagnetic, and power effects within the workflow. This is intended to accelerate the critical design closure.

Synopsys focuses on system-aware co-design instead of overdesign.(Image: Synopsys) — Synopsys focuses on system-aware co-design instead of overdesign.
(Image: Synopsys)

In the era of multi-die architectures and AI accelerators, traditional design methods are reaching their limits. Physical effects such as signal and power integrity, thermal hotspots, and electromagnetic interactions can no longer be considered in isolation. Synopsys has responded to this with Multiphysics Fusion. The goal is a system-aware co-design that replaces the previous safety margin and often costly overdesign with precise simulations.

3x Faster Timing and 10x Acceleration

The new portfolio links Synopsys's AI-driven EDA tools with Ansys's golden signoff analyses. The results from initial customer deployments with industry leaders such as Nvidia, Samsung Foundry, and Cisco are impressive: SPICE-accurate multiphysics timing analysis runs up to three times faster than before. The advantage is even more pronounced in design closure, the final completion of chip design, which can be shortened by up to tenfold.

GPU Acceleration Thanks to Nvidia

A technical driver behind the performance is the use of GPU acceleration. The Nvidia CUDA-X libraries (such as cuDSS) are utilized, allowing complex computations for electromagnetic and thermal analysis to be parallelized. According to Nvidia, this enables up to 13x acceleration for critical power integrity workloads.

Focus on Multi-Die and Analog Design

The platform offers crucial advantages, especially for developers of multi-die systems (chiplets). Synopsys's "3DIC Compiler" now works hand in hand with Ansys's thermal and mechanical analysis tools. This generates system insights already in the early exploration phase, preventing costly redesigns later. Even in the analog domain and with photonic integration (co-packaged optics), the solution enables a seamless workflow from schematics to physical signoff.

For engineering teams, the availability of these multiphysics solutions means the separation between the logical world and physical reality is eliminated. Improved predictability allows PPA targets (Power, Performance, Area) to be set more aggressively, significantly reducing the time-to-market for complex high-performance chips.

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