Advanced Packaging Demand for AI chips fuels OSATs in Asia

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OSATs Ramp Up Packaging Capacity to Meet Surging AI Chip Demand. Foundries like TSMC and OSATs such as JCET and ASE are significantly investing in expanding their packaging capacities. With the demand for AI chips for data centers projected to rise, these companies aim to secure their share of this lucrative market.

Henrik Bork, a long-time China correspondent for the Süddeutsche Zeitung and the Frankfurter Rundschau, is Managing Director at Asia Waypoint, a consultancy firm based in Beijing that specializes in China.

OSATs in Taiwan and the People's Republic of China are currently gearing up for a new boom. The rapidly growing demand for AI chips is ensuring that companies like the Chinese market leader JCET and competitor TFME are heavily investing in new equipment for advanced packaging, Chinese professional media reports. TSMC in Taiwan is also expanding its corresponding production capacities, among other things to be able to keep pace with the order volume of customers such as Nvidia.

"The technology of chip packaging, once seen as a relatively low-tech aspect of semiconductor manufacturing, has become increasingly important in order to keep up with the pace of chip development," Digitimes Asia comments on the current trend.

Taiwanese OSATs still dominate the global market in this segment, but their competitors in the People's Republic of China are quickly catching up, partly with large investments in new factories and equipment. For contract manufacturers in the assembly and test area, packaging and other process steps during chip production have become a billion-dollar business.

Massive OSAT Investments

JCET (Jiangsu Changjiang Electronics Technology) announced in March 2024 that it will spend 4.5 billion yuan (around 580 million euros) to acquire 80 percent of the shares of SDSS, which specializes in developing, packaging and testing flash memory products. SDSS is a subsidiary of Western Digital Corporation (WDC).

It is just one example of the many mergers, acquisitions and capacity expansions in the industry in Asia, with which OSATs and other market participants are currently preparing for the just beginning AI chip boom.

"The competition in the assembly and testing market is intensifying, especially where Moore's Law has slowed down in recent years," writes Trendforce.

Over the past two years, several major companies in the testing and packaging segment have made a name for themselves through major investments. Companies like JCET are convinced that the demand for more and more data centers and computing power will also boost the market for memory chips.

ASE in Taiwan, another heavyweight in the industry, is currently benefiting greatly from the AI boom. It announced in February that it would spend more than 62 million Euros to acquire backend packaging production lines from Infineon in the Philippines.

Huatian Technology, a competitor on the Chinese mainland, already invested about 2.8 billion yuan (around 360 million Euros) last year in building a new packaging factory. It is expected to be able to start production in 2028.

Foundries want to secure their share

At the same time, the large foundries are increasingly pushing into this market. This includes TSMC in Taiwan, whose new technologies such as SoIC, CoWoS or InFO are in high demand. Through its mass production of AI chips, the Taiwanese contract manufacturer is becoming a kind of backbone of the global AI infrastructure.

TSMC is therefore currently expanding its capacities along all process steps in chip manufacturing, including for advanced packaging in its Taichung factory, where most of the work is done for Nvidia. In the TSMC factory in Tainan, where chips are produced for Amazon, upgrades are also being made, reports the Japanese business magazine Nikkei Asia.

At the same time, TSMC is also researching entirely new technologies for chip packaging. The company has recently begun a study for the construction of rectangular, panel-like substrates, reports the Japanese business magazine Nikkei Asia.

In this way, one day more chip sets will fit on a wafer than on the currently largest, round 12-inch wafers. The current trend is clear, Nikkei Asia quotes an industry insider. For the many new data centers and their AI computing power, chip manufacturers are trying to generate more and more computing power per semiconductor, which increases the package sizes. (sb)