Quantum Computing What Makes Logical Qubits Comparable—and What's Still Missing

Qubit counts alone are no longer enough: the new metric is called "logical qubits." But why are manufacturer roadmaps still misleading without circuit performance metrics? And why is error protection determined at the hardware level?

IBM’s roadmap is concrete: 200 logical qubits by 2029 and 100 million error-corrected operations—that is the stated goal of the Quantum Starling system. Other major providers are also increasingly focusing their communications on error-corrected systems. The new standard in quantum computing is logical qubits—that is, error-corrected, robust “virtual” qubits composed of multiple physical qubits—which are used to stably store and process quantum information.

The shift in communication reflects a genuine change in the quantum landscape. The realization that raw qubit counts are insufficient as a metric of progress has gained widespread acceptance. What has been missing from the public debate so far is a uniform framework for classifying these metrics: that is, transparent information on the assumptions and performance indicators used to define, generate, and evaluate a logical qubit.

What the Term Encapsulates—and What Gets Lost in the Process

The number of physical qubits required for a single logical qubit depends on several factors: the error-correcting code used (Surface Code, Repetition Code, etc.), the target code distance, the underlying physical error rate, and the efficiency of the decoder. A logical qubit with a code distance of 3 and a physical error rate of 10⁻³ is not directly comparable to one with a code distance of 7 and a physical error rate of 10⁻⁴. The achievable logical error rate—that is, what matters for applications—can vary significantly depending on the assumptions and implementation.

Many current demonstrations of logical qubits primarily focus on error-corrected storage or limited logical operations. How a system behaves when executing longer, more application-oriented algorithms therefore often remains an open question. Just as a microprocessor cannot be evaluated based solely on its number of transistors—but must also be assessed in terms of clock frequency, cache architecture, and instruction throughput—quantum computers require circuit-level performance metrics. In other words, information on how many consecutive logical operations a system can actually execute without errors.

Quality Is Not a Single Value

For superconducting systems, the relevant quality profile is well known: coherence times, crosstalk between neighboring qubits, the temporal instability of qubit parameters, and leakage rates (transition to states outside the computational space) at the physical level. In addition, the quality of single-qubit and two-qubit operations, as well as circuit-level performance, serve as integrated system metrics.

These parameters interact: A processor with very good single-qubit gates but high crosstalk during two-qubit operations will quickly reach its limits in deep circuits—that is, those with many consecutive operations. Leakage is a particularly problematic type of error because it causes the system to leave the actual computational space, thereby compromising single-qubit operations. Such errors are not readily captured by many standard assumptions in quantum error correction and can accumulate over longer circuits.

This requires a holistic view of all levels of the system. Error analysis on quantum computers must evaluate an abstract error metric—such as the circuit-level or even the performance of error-corrected systems—in the context of physical qubits. Since computational errors in these systems are complex physical processes, these insights must be taken into account when designing higher-level components and, in some cases, resolved at the fundamental hardware level.

Circuit-Level Performance: The Metric That Should Be a Top Priority for Users

Individual gate fidelities describe components, not systems. What matters for applications is a different metric: How many consecutive operations can a system perform before too many errors render the result unusable? This circuit-level performance is harder to measure, but it is the parameter that most directly reflects industrial usability.

Quantum Volume was an initial attempt to quantify exactly that. The metric takes gate errors, connectivity, and coherence times into account collectively and condenses them into a single system metric. This basic idea has established itself in the industry as a basis for discussion, even though it classifies only a specific aspect of the system. CLOPS (Circuit Layer Operations Per Second) supplements this by adding the throughput aspect: How fast can a system actually execute circuits? Together, these two metrics provide a solid basis for evaluation.

What is still emerging in the field is a broader, more consistent, and more transparent application of such metrics across providers and platforms. As long as providers themselves decide which system metrics to publish and which not to, comparability between platforms remains an unresolved issue—regardless of how many well-developed metrics are theoretically available.

Hardware Fault Tolerance: Why the Starting Point Matters

The benchmark debate inevitably leads to a more fundamental question: How good is the physical hardware on which error correction relies? Anyone scaling up quantum processors must simultaneously improve their error rates; otherwise, system overhead will initially increase: calibration cycles become more complex, crosstalk management more resource-intensive, and QEC overhead also rises. Usable computing power thus fails to keep pace.

This has implications for architectural design. One approach that is gaining increasing attention is inherent error reduction: error protection built directly into the qubit’s hardware. The goal is to structurally suppress certain types of errors at the level of the superconducting circuit, thereby improving the starting point for error correction. This structurally reduces the QEC overhead. For example, this results in a lower requirement for physical qubits per logical qubit, as well as potentially lower demands on control electronics and calibration. Error correction remains necessary. However, the starting conditions shift, and with them, what can be achieved with fewer physical resources.

What the Industry Needs Now

When it comes to scientific publications, the community is disciplined: code distance, error-correcting codes, physical error rates, and measurement conditions are generally well documented in the technical literature. The problem lies one level higher—in the translation of these results into roadmaps and press releases. A figure like “200 logical qubits” does not automatically convey the context from the underlying paper: At what code distance? Under what physical error rate? Measured against what circuit-level performance? Without this information, it’s nearly impossible to contextualize a roadmap figure, no matter how concrete it may sound.

Added to this is a standardization problem: Even if individual teams measure rigorously, they do not necessarily follow the same conventions for definition and standardization. This structurally complicates comparisons between providers—regardless of how mature QV, CLOPS, or other circuit-level metrics may already be in individual cases.

The shift from qubit counts to logical qubits was long overdue. What must follow now is a more consistent disclosure of the full set of parameters in public communications. Furthermore, it is essential to examine the physical foundation itself. A significant portion of future scalability is already determined there—before the first error-correction layer is even implemented. 

*Leon Koch is the co-founder and CEO of Peak Quantum, a Munich-based quantum computing company that develops inherently error-resilient, superconducting quantum processors. From 2020 to 2025, the physicist conducted research as part of his doctoral studies at the Technical University of Munich and the Walther Meissner Institute, with a particular focus on quantum computing and nanofabrication. Together with his team, he is working to make quantum computing commercially viable and to build a European ecosystem for scalable quantum computing. At Peak Quantum, he is responsible for strategy, technology development, and manufacturing.

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