Ferroelectric Memory Devices Scientists Overcome a Major Hurdle in Storage Technology

Related Vendors

FAULHABER Drive Systems

Taiwan Machine Tool & Accessory Builders' Association (TMBA)

SIMTOS (Seoul International Machine Tool Show)

At a conference, the Belgian research laboratory Imec presented two innovations in the field of ferroelectric memory that could replace outdated chip memory with faster, higher-density, and more cost-effective alternatives.

Researchers at the Belgian semiconductor institute imec have announced two breakthroughs in a memory technology that many in the chip industry believe could solve one of AI's most pressing hardware problems: the impending collapse of conventional memory.

The results, which were presented at the 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits in Kyoto, pertain to ferroelectric memory. This term refers to chips that store data without a continuous power supply, change state at low voltages, and can potentially store far more information in a smaller space than standard memory chips currently available on the market.

AI workloads consume memory on a scale that conventional technologies were never designed to handle. DRAM memory, in particular, is under significant strain and is increasingly reaching the limits of how small and efficient it can be manufactured. The cost of new memory—which is currently skyrocketing due to high demand—as well as the energy required for further scaling will eventually become unsustainable for data centers that deploy AI on a large scale.

A Possible Path Toward Faster And More Affordable Memory Chips

Imec's initial findings focus on the reliability of ferroelectric capacitors, a key component of memory devices. The team has demonstrated that these components can operate at approximately 1.3 volts—low enough to significantly reduce power consumption—while withstanding more than ten trillion data cycles without failure. This durability is a fundamental requirement for any memory technology that aims to compete in the field of AI infrastructure, where chips operate continuously under heavy loads.

The second result is even more promising from a structural standpoint. According to Imec, the company has developed what it claims is the world’s first functional vertical stack of five ferroelectric memory transistors arranged directly on top of one another in a single column. This is the first time that this technology—already familiar from NAND flash memory in SSDs—has been successfully demonstrated for this type of device. Vertical stacking allows storage density to be multiplied without requiring ever-finer chip fabrication—a decisive advantage, as conventional scaling is reaching its limits.

Sustainable Support for the Growing Demand for AI

In this context, the team also addressed a long-standing limitation of this type of transistor: the difficulty of erasing stored data. By adding a second gate to the device architecture, the researchers were able to significantly improve erasure performance—a solution that brings the technology one step closer to practical application.

According to Attilio Belmonte, program director at Imec, the results demonstrated how advances in materials science and chip integration can go hand in hand. “This work demonstrates how, thanks to imec’s interdisciplinary expertise, we can tackle some of the most pressing challenges in memory technology,” he said in a press release from the research institute. His colleague Maarten Rosmeulen added that the institute is “exploring various paths toward the memory solutions that will be needed to sustain the rapid growth of AI.”(sg)