Quasi-monolithic integration (QMI) High-Density Chiplet Systems Implemented at Wafer Level

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As part of the European pilot line APECS, the Fraunhofer Institute for Photonic Microsystems IPMS has developed a method that enables various chip components to merge almost seamlessly into a single unit. By precisely embedding small chiplets into special silicon pockets, it has become possible for the first time to combine the advantages of a compact single chip with the flexibility of modular systems.

The increasing demands for complexity, computing power, and system compactness call for radically new approaches in semiconductor manufacturing. The vision for future-proof microelectronics envisions systems as powerful as a single chip while offering the flexibility of a modular toolbox. Within APECS, the pilot line for "Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems," Fraunhofer IPMS is pursuing the approach of Quasi-Monolithic Integration (QMI). The goal is to efficiently combine different chip components such as control electronics, sensors, or micro-electromechanical components (MEMS) at the wafer level so that the advantages of a compact single chip are preserved.

From Theory to Reality: Pockets, Placement, and Embedding

Researchers at Fraunhofer IPMS have successfully demonstrated the first critical milestone of the QMI roadmap. "The foundation of QMI is silicon wafers with structured recesses (pockets). For the first time, dummy chiplets were incorporated into these so-called pocket wafers, and the surface was leveled with a passivation layer for subsequent backend-of-line wiring," explains Dr. Lukas Lorenz, group leader at Fraunhofer IPMS. "This creates a nearly monolithic system architecture that combines the highest integration density with modular expandability." This achievement paves the way for the industrial maturity of the entire process chain for future industrial applications.

Technological Advantages: Higher System Performance with Maximum Compactness

The QMI technology offers significant advantages over conventional packaging methods. The basis for this is the arrangement of chiplets on an active or passive wafer substrate with a common interconnect stack. Since the interconnection is subsequently carried out within the frontend line, considerably higher connection densities can be achieved compared to traditional methods. This results in the following benefits:

Higher performance: Shortened signal paths reduce losses and latencies and increase processing speed at the system level.

Reliability: The reduction of mechanical interfaces increases the robustness and lifespan of the systems.

Compactness: QMI saves significant space as the elements are nearly monolithically integrated.

Cost efficiency: The combination of modular chiplet approaches enables economical high integration while ensuring short innovation cycles and high scalability.

These advantages make quasi-monolithic integration suitable for innovations such as highly integrated SoCs (System-on-Chip) for AI applications (sensor AI) as well as intelligent transceivers with high bandwidth.

Dr. Lorenz emphasizes: "Although the current demonstrator is based on dummy structures, the process chain can be transferred to real customer applications. This enables a scalable integration architecture for future heterogeneous system solutions." Fraunhofer IPMS is thereby addressing industrial partners whose products can benefit from the high-density integration of different technologies. The approaches developed within APECS thus form the basis for transferring QMI into production-related manufacturing environments in the near future.