Cooperation NXP And Rimac Are Working on Centralized Vehicle Architecture for SDVs

From Stefanie Eckardt | Translated by AI 2 min Reading Time

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Semiconductor manufacturer NXP and Rimac Technology announced that they plan to jointly develop a centralized vehicle architecture for software-defined vehicles in the future.

The architecture jointly developed by NXP and Rimac consolidates over 20 control units into three central units.(Image: NXP)
The architecture jointly developed by NXP and Rimac consolidates over 20 control units into three central units.
(Image: NXP)

The automotive industry is working tirelessly on software-defined vehicles (SDVs). It's no wonder, as SDVs have various advantages. They not only provide improved flexibility, personalization, and safety but also offer the ability to update vehicle functions throughout their entire lifecycle.

To make the software-defined vehicle (SDV) a reality as quickly as possible, more and more companies are joining forces, like NXP Semiconductors and Rimac Technology. The aim of the partnership is to develop a centralized vehicle architecture. The jointly developed solution is based on the semiconductor manufacturer's S32E2 processors, which are part of the S32 Automotive Processing Platform. This platform addresses current and future requirements for connectivity, security, and functional safety. The S32E2 was specifically designed for deterministic real-time domain and zone control in multi-application environments.

Initial Use in Hypercars

The architecture developed by the partners offers a user-friendly platform for the easy and efficient integration of various vehicle applications, such as vehicle dynamics control, charge management, energy and thermal management, and body electronics. Rimac Technology initially plans to use the new ECU platform in the hypercar sector and aims to scale it to other vehicle segments and alternative mobility areas.

S32E2 Processor Family

The heart of the new ECU platform is the S32E2 processor, which enables the consolidation of more than 20 ECUs into three centralized units. The chip integrates eight Arm Cortex-R52 processor cores with clock rates of up to 1 GHz, high-resolution analog-to-digital converters, and supports up to 64 MB of non-volatile memory.

The S32E2 processor family meets the functional safety requirements according to ISO 26262 ASIL D and provides a secure and powerful foundation for SDV architectures. The platform offers a comprehensive security architecture with end-to-end core-to-pin isolation, ensuring interference-free operation and error resolution at the application level throughout the device. The integrated hardware security engine also provides features such as secure boot, key management, and extensive security services.

The S32Z2 and S32E2 series complement NXP's S32 Automotive Processing Platform, positioning themselves between the S32K5 microcontroller family and the 5-nm S32N processors for highly integrated real-time applications. The semiconductor manufacturer offers support for development based on S32E2 processors, including the FS86 safety system basis chip (ASIL D), the power management IC PF5030 with enhanced safety features, Ethernet switches and PHYs, as well as CAN transceivers. The system is further complemented by analog companion ICs such as the GD3160 gate driver for IGBT/SiC high-voltage inverters and the MC3377x battery cell controllers. (se)

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