State-of-the-art CMOS process technology High-NA-EUV facility set up in 5 months - Intel dispels cost concerns

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High-NA-EUVL lithography systems promise Intel a significant advantage in the production of next-generation chips. The exposure system supplied by ASML to the Intel Foundry in Hillsboro is completed in just under five months. Now it's time for the calibration process - and to address the rumors that the technology is too expensive.

In the manufacture of processors, High-NA-EUVL is an exciting technological advancement that makes it possible to produce smaller, more precise structures on chips, leading to more powerful and energy-efficient results. To do this, a light wavelength of 13.5 nm is used, which does not occur naturally on Earth. The beams of high-powered lasers hit a tin droplet that is over 200,000 degrees Celsius. The light is then reflected by a stencil with the desired circuit pattern and then through a system of precise mirrors.

Innovation in chip manufacturing is important to meet the increasing demands of technologies such as artificial intelligence and 5G communication. In addition, the use of High-NA-EUVL is expected to lower production costs and consequently increase competitiveness. "Compared to 0.33NA EUV, High NA EUV (or 0.55NA EUV) can provide a higher imaging contrast for similar features, allowing less light per exposure and reducing the time required to print each layer, thereby increasing wafer production," is reported by Intel Foundry.

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Construction completed, calibration underway

The first High-NA-EUVL system sold by lithography machine manufacturer ASML was delivered to Intel Foundry in Hillsboro, Oregon (USA) in December 2023 and now, nearly five months later, the device is fully assembled, as Intel officially announced on April 18, 2024. After the assembly work, however, comes the calibration process, which is now being tackled by Intel and ASML employees.

Intel intends to use both 0.33NA EUV and 0.55NA EUV along with other lithography processes in the development and manufacture of advanced chips, starting with product proofs for Intel 18A in 2025 and continuing with the production of Intel 14A.

"Combined with Intel Foundry's other leading process technologies, High NA EUV is expected to be able to print features up to 1.7 times smaller than existing EUV tools. This enables the scaling of 2D features and thus up to 2.9 times higher density. Intel continues to lead in the development of ever smaller and denser structures that drive Moore's law in the semiconductor industry," Intel shares.

Intel expects cost efficiency

High-NA-EUVL has already been criticized for the cost to chip manufacturers of acquiring the systems, the associated factory modifications in some cases, and initially lower throughput numbers. While a low-NA machine costs under 200 million US dollars, a high-NA system costs around 400 million US dollars. However, regarding costs, Mark Phillips, Director of Lithography Hardware and Solutions at Intel, spoke with Paul Alcorn at Tom's Hardware, these do not catch Intel unprepared.

As mentioned earlier, Intel will use different exposure processes. Modern semiconductors consist of several layers, each layer having different levels of complexity and different structure sizes. The plan at Intel is to use High-NA only for an unspecified number of critical layers that require the smallest structure sizes. Older Low-NA-EUV, 192-nm-ArFI and even 248-nm-KrF-DUV technologies are used for other layers, the latter being used for the upper interconnect layers with larger features.

"I want to add that it's not as if ASML built this tool and then came to us and asked if we wanted to buy it. We started working with ASML more than a decade ago and having these discussions about the business case for the tool," says Phillips. "What are the right trade-offs between the tool costs and the capabilities to make it a profitable tool? So, we knew these capabilities, these specifications, and the price when we decided on these tools years ago. And really, there were no surprises." (sb)