Wi-Fi HaLow transmitter for IoT How Morse Micro Reduces the Power Consumption of its SoC to a Quarter

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The MM8108 is a CMOS SoC that transmits via Wi-Fi HaLow and is (therefore) four times as efficient as conventional Wi-Fi transmitters. Here, we describe the techniques the Australians used to achieve this.

Modern wireless communication systems must enable high data rates, long ranges, and long battery life simultaneously—a combination of requirements that presents a challenge, especially in the design of energy-efficient transmitters. This is particularly the case with OFDM-based standards, which include Wi-Fi HaLow (IEEE 802.11ah). The reason for this lies in the high Peak-to-Average Power Ratio (PAPR) that is typical of OFDM signals.

This property has been documented in numerous studies, such as in the IEEE publication "On the High Peak-to-Average Power Ratio of OFDM Signals" (Han & Lee, 2005). Traditional linear power amplifiers often operate inefficiently here, as they must be operated well below their peak power in normal operation to ensure linear signal transmission.

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The Australian company Morse Micro addresses this challenge with the MM8108, a highly integrated CMOS System-on-Chip (SoC).

The manufacturer's own measurement results of the MM8108 show significant efficiency gains compared to similar solutions. While market-standard CMOS-based Wi-Fi transmitters typically achieve efficiencies between 7 and 12 percent, the MM8108, according to the manufacturer, reaches 37 percent. This corresponds to an efficiency increase of about four times compared to common solutions.

Viewed system-wide, this specifically means - based on system-level measurements under practical laboratory conditions with realistic circuit integration:

• Extended battery life: Thanks to four times higher efficiency, energy consumption is significantly reduced, which particularly benefits IoT and battery-powered devices.

• Reduced thermal load: Less energy loss leads to lower heat generation and thus simplified thermal management.

• Improved network coverage and data rates: Efficient signal amplification allows devices to achieve greater ranges or better throughput rates.

The system-level measurements were carried out under realistic conditions, including all necessary supporting circuits and a single operating voltage source. This makes the MM8108 a practical and ready-to-use solution that fully complies with regulatory requirements.

Architecture optimizations in the MM8108

The chip combines the following technologies to reduce efficiency loss under realistic operating conditions:

• Digital Power Amplifier (DPA): Instead of conventional analog amplifiers, the DPA uses fast digital circuits. This minimizes losses and enables more efficient signal amplification.

• Multi-Way Doherty Configuration: The amplifier is divided into multiple sub-arrays, each optimized for different power levels. This ensures high efficiency even with significant power back-offs.

• Polar Modulation: By decomposing the signals into amplitude and phase components, more efficient processing is achieved, resulting in better linearity and overall efficiency.

• Supply Voltage Scaling: By dynamically adjusting the supply voltage, efficiency losses that would otherwise occur when reducing output power are minimized.

• Digital Predistortion (DPD): This technique corrects distortions caused by nonlinear effects. Thus, the transmitter reliably meets stringent spectral and linearity requirements. Additionally, the transmitter is flexible enough to meet future requirements such as higher modulation schemes (e.g., 1024QAM), larger channel bandwidths, and higher frequency bands—ranging from 2.4 GHz up to 6 GHz.

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