"Renesas aims to enable next-generation robotics"

Interview with Keigo Kawasaki, Renesas "Renesas aims to enable next-generation robotics"

2024-03-19 From Michael Eckstein | Translated by AI 6 min Reading Time

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The RZ/V2H microprocessor combines AI and OpenCV accelerators as well as a CPU on one chip. Its "Dynamically Reconfigurable Processor" technology is designed to enable AI image processing and real-time control without active cooling. We talked about this with Keigo Kawasaki, Director of Embedded Processing MPU Product Marketing at manufacturer Renesas.

Dynamic trio: The RZ/V2H is based on a heterogeneous architecture in which dynamically configurable AI accelerators (DRP-AI), OpenCV accelerators (DRP), and CPUs work together.(Image: Renesas Electronics) — Dynamic trio: The RZ/V2H is based on a heterogeneous architecture in which dynamically configurable AI accelerators (DRP-AI), OpenCV accelerators (DRP), and CPUs work together.
(Image: Renesas Electronics)

The Japanese chip manufacturer Renesas has expanded its RZ microprocessor family: With the highest computing power within the RZ family, the new RZ/V2H is designed to enable image-processing AI and real-time control functions for robotic applications. Renesas will present the new chip for the first time at this year's Embedded World in Hall 1, Booth 234. We had the opportunity to speak with Keigo Kawasaki, Director of Embedded Processing MPU Product Marketing at Renesas, in advance.

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