Materials research for semiconductor innovations Moore's Law still has more to offer

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Moore's Law, the principle predicting that the number of transistors on a chip doubles every two years, has driven exponential growth in computing power. However, it is now approaching its physical limits.

Today's most advanced chips contain nearly 50 billion transistors in an area no larger than a thumb nail. The task of fitting even more transistors into this limited space is becoming increasingly difficult, as researchers at Penn State University have found.

In a study published in "Nature", Saptarshi Das, associate professor of engineering and mechanics and co-author of the study, and his team propose a very interesting solution: seamless implementation of 3D integration with 2D materials.

In the world of semiconductors, 3D integration means the vertical stacking of several layers of semiconductor components. This approach not only makes it easier to pack more silicon-based transistors onto a computer chip, commonly referred to as "More Moore", but also allows the use of transistors from 2D materials to incorporate various functions into different layers of the stack, a concept known as "More than Moore".

With the work described in the study, Saptarshi and the team show feasible ways that go beyond the scaling of current technology to achieve both "More Moore" and "More than Moore" through monolithic 3D integration.

Monolithic 3D integration as an opportunity

Monolithic 3D integration is a manufacturing process in which the researchers fabricate the components directly on the underlying layer, unlike the traditional process in which independently manufactured layers are stacked.

"Monolithic 3D integration offers the highest density of vertical—which would require microbumps, where two chips are connected together, allowing more space for the fabrication of connections," said Najam Sakib, a scientific associate and co-author of the study.

According to Darsith Jayachandran, a scientific associate in engineering, monolithic 3D integration poses significant challenges as conventional silicon components would melt at processing temperatures. "A challenge is the upper limit of the process temperature of 450 °C for the back-end integration of silicon-based chips—our monolithic 3D integration approach significantly reduces this temperature to less than 200 °C," Jayachandran said, explaining that the upper limit of the process temperature is the maximum allowable temperature before the prefabricated structures are damaged. "Incompatible process temperature budgets make monolithic 3D integration with silicon chips a challenge, but 2D materials can withstand the temperatures required for the process."

The researchers utilized existing techniques for their approach, but they are the first to successfully achieve a monolithic 3D integration on this scale with 2D transistors from 2D semiconductors, called transition metal dichalcogenides. Stacking the components vertically in 3D integration also enabled more energy-efficient data processing, as it solved a surprising problem for such tiny things as transistors on a computer chip: the distance.

"By vertically stacking components, the distance between components is reduced, as is the delay and power consumption," said Rahul Pendurthi, also a co-author of the study.

More Moore and More than Moore

By reducing the distance between the components, the researchers achieved "More Moore". By incorporating transistors from 2D materials, the researchers also met the "More than Moore" criterion. The 2D materials are known for their unique electronic and optical properties, including light sensitivity, making them ideally suitable as sensors as well.

This is useful, the researchers say, as the number of networked devices and "edge" systems, things like smartphones or wireless weather stations that collect data at the "edge" of a network, continues to increase. "More Than Moore refers to a concept in the world of technology where we not only make computer chips smaller and faster, but also equip them with more features," said Muhtasim Ul Karim Sadaf, a scientific associate. "It's about equipping our electronic devices with new and useful features, such as better sensors, improved battery management, or other special functions, to make our devices smarter and more versatile."

According to the researchers, using 2D components for 3D integration has numerous other advantages. One of these is the higher mobility of the charge carriers, meaning the way an electrical charge is transported in semiconductor materials. Another advantage is the ultra-thin design, which allows the researchers to accommodate more transistors on each level of the 3D integration and achieve a higher computing power.

While most academic research is conducted with small prototypes, this study demonstrated 3D integration on a large scale by characterizing tens of thousands of components. According to Das, this performance bridges the gap between science and industry and could lead to future partnerships where the industry utilizes the 2D materials and facilities of Penn State University.

The progress in scaling was made possible by the availability of high-quality transition metal dichalcogenides on a wafer scale, developed by researchers from the Two-Dimensional Crystal Consortium (2DCC-MIP) at Penn State, a material innovation platform of the U.S. National Science Foundation (NSF).

Progress through materials research

"This breakthrough once again demonstrates the essential role of materials research as the foundation of the semiconductor industry and the competitiveness of the USA," said Charles Ying, program director for the NSF's material innovation platforms. "The years of effort of the consortium for two-dimensional crystals at Penn State, to improve the quality and size of 2D materials, has made it possible to achieve the 3D integration of semiconductors on a scale that could be of great significance for electronics."

According to Das, this technological advance is just the first step. "Our ability to demonstrate a large number of components on a wafer scale shows that we have been able to translate this research to a scale that can be appreciated by the semiconductor industry," Das said.

"We have built 30,000 transistors into each layer, which could be a record number. This puts Penn State in a unique position to lead part of the work and collaborate with the American semiconductor industry to advance this research."

The National Science Foundation and the Army Research Office supported this research project. (sb)

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