Chip design in the semiconductor industry How holistic IP management can succeed

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The semiconductor industry faces massive growth until 2031. This brings tremendous complexity. Companies need a comprehensive approach to IP lifecycle management. Security and compliance in chip projects and collaboration among development teams are at the center of this.

In the semiconductor industry, chip development is in full swing as the global market is expected to grow by 71.3 percent between 2023 and 2031. By integrating heterogeneous components from different nodes and technologies, semiconductor development teams are reviving Moore's law and paving the way for designs with billions of transistors and hundreds of IPs (Intellectual Property).

To manage the associated complexity, companies must adopt a comprehensive approach to IP life cycle management that encompasses more than just the IP itself and takes a holistic view of the life cycle. Simon Rance, Director of Product Management at Keysight, talks about IP management in chip projects and how development teams can improve IP security and compliance.

Mr. Rance, what are the main challenges related to IP management in chiplet projects?

Due to the complexity and shorter lead times for new designs, much more IP is being reused. Most development teams work with both proprietary IP, often viewed as a company's secret ingredient, as well as licensed third-party IP. This mix highlights the need for a unified platform capable of distinguishing between proprietary and third-party IPs while simultaneously providing transparency about the various attributes of each IP.

For example, a chip-based design can contain various IPs across different process nodes. As developers have to select the right IPs based on process technologies, origin, and licensing details, the traditional practice of tracking IPs with a spreadsheet has become obsolete. Key questions are: does the existing license permit the use of the IP in a chip-based design?

In addition, a rigorous verification process should be implemented. This ensures that the integrated IP blocks function coherently and meet all design standards and requirements. The chiplets are expected to be in operation for ten or 20 years. Therefore, verifying and maintaining the IPs throughout their entire lifecycle is a particular challenge, especially when personnel changes occur over time.

How can development teams improve the security of intellectual property and ensure compliance with regulations in a multi-vendor chiplet design environment?

The broad adoption of chip technology has significantly increased the requirements for intellectual property security and regulatory compliance. My three recommendations: Firstly, rigorous access controls play a crucial role in securing semiconductor IP. IP management systems should restrict access based on defined criteria such as work functions, geographical locations, and security levels.

In light of increasingly stringent export controls, development companies need to integrate so-called geofencing features. They restrict access to certain IPs based on a person's physical location, regardless of whether it's a contractor, developer, or architect. For large chip projects with multiple suppliers, companies should consider custom control points, such as restricting a specific IP to a single design to prevent unauthorized reuse in subsequent projects.

Another integral part of IP lifecycle management is checking the licensing status of IPs to ensure that the development teams are authorized to use them. In a chip-based design, the verification process helps to determine whether an IP has already been used in another project within the company and whether it is available for use in new designs. This helps to avoid license violations and potential legal and financial consequences.

Thirdly, precise traceability of IP usage aids in maintaining security and compliance. Engineering Change Orders (ECOs) and industry standards like functional safety (e.g. ISO 26262 for the automotive industry) can be optimised. Effective IP management should, for example, be able to create detailed reports about the exact use of an IP, its dependencies and its hierarchy within its designs. IP managers receive crucial information throughout the entire IP life cycle and can trace this precisely. Additionally, the traceability of the design is enhanced through a single source of information.

Can you name some best practices that facilitate collaboration between development teams? Especially when teams are working on chiplet-based projects!

Firstly, as we move towards chip-based designs, a centralized IP management strategy is necessary for solid collaboration. This ensures that each team member is working with the latest libraries and the lineage of each IP piece is traceable. In a multi-vendor environment, the security of sensitive IP is of utmost importance. For example, all team members should be clearly aware of which data can be shared with other vendors and which cannot when testing die-to-die connections.

Furthermore, it is crucial to secure the data during transmission, whether it's through workflow tools or between teams. At Keysight, we have implemented encrypted data transmissions and secure file-sharing protocols to protect IP information. For companies in the aerospace and defense industry, the need for secure workflows is driving the demand for integrating blockchain into IP management.

How do you integrate workflows for chiplet designs with various EDA tools?

The integration of chip design workflows with various EDA tools (Electronic Design Automation) is a complex process. Standard or self-developed solutions for data import and export are becoming more cumbersome and error-prone. For example, how can the connection between chiplet one and chiplet two be verified company-wide when integrating different chiplets? How can the development history of an IP be traced to determine if it has been successfully used in previous SoC projects?

Such forms of data exchange and communication should take place via a platform. Everyone knows where to find the data, how to use the IP, project notes can be tracked, and an IP audit report can be created.

At Keysight, we provide our customers with a unified environment that's integrated with all EDA tools from Synopsys, Cadence, Siemens EDA and our own Advanced Design System (ADS) platform. Keysight IP Management (HUB) offers a comprehensive insight into all development data and IPs at the corporate level. By consolidating all data and IPs into a unified platform, we minimize the risk of information silos and ensure that all team members can access the latest, accurate versions.

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Link: EDA Platform for Multi-Technology Simulation (Keysight)