Fully Homomorphic Encryption Intel Shows Functional FHE Accelerator for Calculations on Encrypted Data

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With Heracles, Intel is demonstrating a special accelerator for Fully Homomorphic Encryption, which processes encrypted data directly without decryption and significantly accelerates FHE operations. Sensitive data also remains securely protected during the processing procedure.

Intel has presented Heracles, a special chip that performs calculations on fully encrypted data without having to decrypt the data during processing. The accelerator was presented at the ISSCC and is designed for Fully Homomorphic Encryption, or FHE for short. The aim is to protect sensitive data from attacks even during the actual processing.

For years, FHE has been considered a promising approach for data protection-critical applications, such as cloud services, medical analyses or secure database queries. However, practical use has often failed to date due to the high computing costs. Compared to processing unencrypted data, today's CPUs and GPUs require many times more time for FHE operations.

According to Intel, Heracles achieves an acceleration by a factor of 1074 to 5547 for seven central FHE operations compared to a 24-core Xeon of the Sapphire Rapids generation. In a demo shown, an encrypted query on a Xeon server took 15 milliseconds, while Heracles completed the same task in 14 microseconds. Extrapolated to large amounts of data, the difference would be significant.

Architecture for A Narrowly Defined Application

Heracles is not a general-purpose processor or x86 system, but a dedicated accelerator for FHE math. The chip does not run general-purpose software or an operating system. It is designed to efficiently map precisely those operations that cause the greatest effort in homomorphic encryption.

Technically, Intel relies on a highly parallelized architecture with 64 so-called tile pairs, which are arranged in an 8×8 mesh. Each tile pair contains 128 parallel computing paths, resulting in an 8192-fold SIMD computing network. The units are optimized for modular addition, subtraction, multiplication and butterfly operations for number-theoretic transforms and inverse transforms.

Heracles uses 32-bit arithmetic slices for the calculations. According to Intel, this decision was an essential architectural approach to keep precision and parallelism in a practicable ratio. Since FHE works with very large numbers, polynomial arithmetic, automorphisms and bootstrapping, the aim is to improve speed and scalability without losing sight of the mathematical requirements.

Data Movement Becomes the Central Bottleneck

A significant part of the challenge lies not only in the computing logic, but also in the data movement. FHE typically increases data volumes by orders of magnitude compared to plain text. This significantly increases the requirements for memory connection, intermediate storage and internal data paths.

Heracles is therefore equipped with 48 GByte HBM3, distributed across two memory stacks, and connects these to the processor at 819 GByte/s. In addition, there are 64 MB of internal scratchpad or cache memory, large register files and dedicated buffers. Within the chip, data is transported between the computing units via wide connections and with a throughput in the terabyte range per second.

In order to decouple computing and data traffic from each other, the accelerator works with three synchronized instruction streams simultaneously: one for data transfer to and from the chip, one for internal data movement and a third for the actual computing operations. Intel sees this as a decisive factor for the acceleration achieved, as FHE workloads are heavily dependent on the balance between computing load and memory accesses.

Start-Ups Are Working on Comparable Solutions

Heracles is manufactured using the Intel 3 process. The chip occupies 0.31 in², clocks at 1.2 GHz, operates within a power range of 176 watts and is designed as a liquid-cooled PCIe accelerator card for use alongside standard servers. Several important FHE schemes are supported, including BGV, BFV and CKKS, as well as different parameter sets and security levels.

Intel classifies Heracles as the result of a multi-year DARPA program that was specifically designed to accelerate FHE with custom hardware. The company particularly emphasizes the scaling achieved, both in terms of chip size and computing power. According to the project team, Heracles thus marks an early but important step towards practically usable encrypted data processing.

At the same time, the market is still open. Start-ups such as Niobium Microsystems, Fabric Cryptography, Cornami and Optalysys are also working on FHE accelerators, partly with digital and partly with photonic approaches. While Intel has not yet mentioned any specific commercialization plans, other providers are already explicitly targeting cloud and AI infrastructures. Heracles thus shows above all that specialized hardware can significantly push the performance limits of FHE, even if it remains to be seen which architecture will prevail in practical use.(sg)

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