Green IT infrastructures Germanium-Tin paves the way for On-Chip Energy Harvesting

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Harvesting energy directly on the chip: Scientists from Italy, Germany and Great Britain have made an important step in the development of a semiconductor that could make this feasible in the future. The Germanium-Tin alloy can easily be integrated into the CMOS process and has the potential to convert the waste heat from computer processors into electricity.

The increasing use of electronic devices in all areas of life is driving up energy consumption. A large part of this energy is released into the environment in the form of heat. In Europe, about 1.2 exajoules are lost each year from IT infrastructures and data centers, as well as devices like smart devices. This waste heat (temperatures below 80°C) is difficult to utilize due to poor thermodynamic efficiency and technological limitations.

Therefore, it would be ideal to return the low-temperature heat. However, there are very few materials capable of converting this heat into electrical energy, and none of them are compatible with the current technology in semiconductor manufacturing plants.

Scientists from the Jülich Research Center and the IHP (Leibniz Institute for Innovative Microelectronics) in Germany, the universities of Pisa and Bologna in Italy, and the University of Leeds in the UK have now reached a milestone in the development of such a semiconductor material that is suitable for energy generation on chips and is compatible with the CMOS process of chip manufacturing.

"Adding tin to germanium significantly reduces thermal conductivity while maintaining electrical properties - an ideal combination for thermoelectric applications," explains Dr. Dan Buca, head of the research group at the Jülich Research Center. The low thermal conductivity—confirmed experimentally—underscores the great potential of GeSn alloys as a thermoelectric material.

Energy Harvesting by GeSn in Silicon Chips

The idea behind it: By integrating GeSn into silicon microchips, it becomes possible to utilize the waste heat generated during operation and convert it back into electrical energy. This "Energy Harvesting" on the chip could significantly reduce the need for external cooling and electricity, thus increasing the efficiency of electronic devices.

CMOS-compatible materials for efficient energy harvesters at temperatures characteristic for operation on the chip and body temperature are the key components for sustainable green computing and Internet of Things applications with extremely low power consumption.

In this context, the lattice vibration thermal conductivity (κ) of new semiconductors of group IV, Ge_1-xSn_x alloys, is the subject of research. To this end, the researchers epitaxially deposited layers containing up to 14 atom-% tin via chemical vapor deposition (CVD) on germanium-buffered silicon wafers. An abrupt decrease in lattice vibration thermal conductivity (κ) from 55 W/(m-K) was verified as independent of layer thickness for low-stress alloys.

The results underline the high potential of single-crystal GeSn alloys to achieve a similar energy recovery capability as is already present in SiGe alloys, but in the temperature range of 20 to 100 °C, where silicon-compatible semiconductors are not available. This opens up the possibility of a monolithically integrated thermoelectric on the CMOS platform.

Integration of photonics, electronics and thermoelectric on silicon chip

Group IV elements in the periodic table, also known as the silicon group, form the basis of every electronic device. By combining them into alloys, the areas of application expand to thermoelectrics, photonics, and spintronics. As a long-term goal, the integration of photonics, electronics, and thermoelectrics on the same chip with silicon-based technology comes within reach. This would not only improve the performance of the devices, but also support the development of more sustainable technologies.

"We have evaluated one of the most critical parameters for a thermoelectric material, the thermal conductivity, by applying a range of different experimental techniques to epitaxially grown layers with different alloy compositions and thicknesses," explains Prof. Giovanni Capellini, project manager at IHP, describing the important development step. "Our joint research can have significant impacts on Green IT infrastructures."

The research groups at the Jülich Research Centre and IHP are continuing their collaboration to further develop the material. The goal is to expand the composition of the alloy to Silicon-Germanium-Tin (SiGeSn) and the group IV alloy with the addition of carbon (CSiGeSn), thereby creating a functional thermoelectric device that can demonstrate the potential of energy recovery through group IV alloys.

The activity is financially supported by a newly awarded DFG grant "SiGeSn Alloys for Energy Generation at Room Temperature". In addition, the work is supported by the board of the Jülich Research Centre and the cooperative doctoral project "CMOS Energy Generation for Big Data Applications". (kr)

Link: To the publication in Applied Energy Materials (ACS)