In-Chip Microfluidics Cooling Directly in Silicon is Supposed to Provide Up to Three Times Better Heat Dissipation

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Microsoft Deutschland GmbH

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Microsoft showcases cooling channels etched directly into the back of the chip. The microfluidics direct the coolant to hotspots, significantly reducing temperature peaks. The company is evaluating integration into future proprietary chips and describes it as a realistic path toward data centers.

AI servers are running hot. With each GPU generation, TDP and power density increase, and traditional cold plates are foreseeably reaching their limits. In Microsoft's lab setup, coolant circulates through finely structured channels in the silicon. Measurements showed up to three times higher heat dissipation compared to cold plates. Part of the experiments included a Teams-related workload. The channel geometry was developed with support from Corintis, which optimizes topologies for local hotspots using AI. Microsoft also reports a 65 percent reduction in maximum temperature increase in the GPU silicon.

Microfluidics would enable designs with higher power density, offering more customer-relevant functions and better performance in smaller spaces. "Those who continue to rely heavily on traditional cold plate technology will not progress," said Sashi Majety of Microsoft.

Status Quo With Cold Plates: Future Vs. Today

Today, direct-to-chip liquid cooling with cold plates and single-phase water or water-glycol circuits dominates in hyperscaler and increasingly in colocation environments. Two-phase systems without water, such as Zutacore, rely on boiling dielectrics and address significantly higher chip loads. Immersion cooling submerges entire servers in a dielectric and offers strong thermal scalability but requires different service models and infrastructure.

At the packaging level, foundries are already showcasing silicon-integrated coolers. TSMC, for example, is testing fusion-bonded silicon "lids" with microchannels (IMC-Si), which allow for warm water and dissipate kilowatts of power per component. Microsoft's approach follows a similar direction but focuses on the operator's perspective: cooling closer to the heat source, lower thermal resistances (fewer TIM layers, no traditional heat spreader), and thus higher inlet temperatures for the coolant.

Challenges: Manufacturing, Service, Reliability

The idea is not new, but the step of a hyperscaler with concrete metrics is. The real challenge lies in industrialization: microchannels in the die or a silicon lid require stable etching and bonding processes, strict particle control, and reliable fluid connections at the package level. Field serviceability needs filtration, leak detection, corrosion and material compatibility, as well as monitoring for erosion and clogging. All of this must operate reliably for years—in racks with increasing power density.

The metrics are also shifting. PUE alone falls short when cooling moves into the IT device. Operators are focusing more on TUE/ITUE, the potential increase in supply temperatures, and usable waste heat. Microfluidics directly on silicon can provide leverage here, as higher inlet temperatures facilitate more economical cooling and heat recovery.

Similar Research is Being Conducted in Japan

A concept recently discussed in Elektronikpraxis from Japan (University of Tokyo) follows the same basic idea: microchannels in or on silicon. However, this approach employs a two-phase regime: water evaporates in an embedded 3D capillary structure directly at the hotspots. This promises very high local heat transfer but is currently based on lab setups and academic prototypes.

Microsoft, on the other hand, demonstrates a single-phase system with back-etched channels, optimized distribution, and a clearly targeted data center context. The comparisons mentioned there explicitly refer to today's common cold plates, whereas the Japanese study evaluates its effects against "conventional methods" and with laboratory-specific parameters.

Both approaches bring cooling closer to the source; the two-phase variant targets maximum power density, while the single-phase focuses on integration, serviceability, and supply temperatures. In practice, what matters is whether packaging, tightness, and maintenance can be managed over the years. Here, Microsoft provides the more pragmatic path, while the Japanese solution demonstrates the theoretical potential.

What Matters for Operators

In the short term, D2C with cold plates remains the standard, as retrofitting and operation are proven, and the supply chain is established. Two-phase solutions and immersion expand the options when individual chips or entire racks exceed the limits of single-phase systems. Microfluidics within or on the die provides additional flexibility: it relieves hotspots, allows for tighter power budgets, and can increase rack density without requiring extreme chilled water systems. The price for this is higher integration and service complexity, as well as the need to closely align packaging and facility design.

Outlook: Cooling Medium, Service Concept, And Timeline

Microsoft positions microfluidics as a candidate for future custom chips and aims to work with manufacturing partners to establish a pathway toward data centers. Open questions remain: In the target state, are the channels etched into the active die, or is it a bonded silicon lid? Which cooling medium is planned—deionized water or a dielectric—and with what additives and lifespan? What does the service concept look like for filters, sensors, and leak detection at the package level?

Microsoft does not provide a timeline. However, it is clear that increasing chip loads are forcing cooling even closer to the source. Those looking to expand power density and waste heat utilization need solutions beyond traditional cold plates: microfluidics now visibly belongs on this list. (mc)

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